Folding Forum

Intel announced the Xeon Phi coprocessor. http://www.anandtech.com/show/6017/inte ... oes-retail
Do you think it would be useful for FAH? Intel aims for 1 TFLOPS real world double precision performance. No word on single precision though.

That is quite impressive. I guess it will remain to be seen how F@h performs on it. Can a WU properly scale to 50+ cores? Can the data move around fast enough to be processed efficiently? What types of scientific calculations is it, and is it not, capable of? Will it require a new FAHcore? I have no idea.

I am thinking, since they have simpler cores, they will perform somewhat like GPUs. Very fast, yet not very flexible.

http://tech.slashdot.org/story/12/06/18 ... -this-year
I wonder if this addon card will help highend folding

Will this only work in conjunction with Xeon chips, or will they go with the SB-E chips as well?

csvanefalk wrote:Will this only work in conjunction with Xeon chips, or will they go with the SB-E chips as well?

I guess they work only with Xeons or by themselves. From the article :

Xeon Phi co-processors can either be used as a proper co-processor alongside a traditional Xeon processor or as a standalone device

Meanwhile on the software side of things in an interesting move Intel is going to be equipping Xeon Phi co-processors with their own OS, in effect making them stand-alone computers

and

The fundamental purpose of the Xeon Phi family is to bring highly threaded processing to x86, allowing x86 developers to quickly integrate the co-processor into their existing workloads and code

Being developed "to bring highly threaded processing to x86", does it mean they're as flexible as SMP?
And since it's x86, and it runs an embedded Linux, I wonder if we can just plug it in, install FAH, and fold straight away?

http://www.intel.com/content/dam/www/pu ... -brief.pdf

Looks like something similar to those Co-Proc units from a couple of years back. If they make them mainstream and affordable (ie less than $2000 per unit), then this might be a viable way for the elite folders to get a few more points. But id love it if they made them available to the mainstream users.

I guess also it will need new code to allow folding to make use of them.

Unless such devices become common place it is very unlikely that Stanford is going to create a client for it. There have been several instances that Stanford has declined to create a client because there just wasn't enough of them to justify the allocation of resources. If they haven't created a GPU client for Linux why would anyone think something like this would get one...

They will become commonplace if the price is right, as v00d00 said
Cross your fingers people

careful this card uses (50) x86 cores and the total power is 1TFLOPS !
The power of NVIDIA Tesla K20 (based on the GK110) is 2TFLOPS, so be careful because the computing power is not comparable with GPGPU !

And I do not imagine the price ...

P5-133XL wrote:Unless such devices become common place it is very unlikely that Stanford is going to create a client for it. There have been several instances that Stanford has declined to create a client because there just wasn't enough of them to justify the allocation of resources. If they haven't created a GPU client for Linux why would anyone think something like this would get one...

I'd predict the same thing (though I don't know any more than you do).

One side of the question is how common the hardware will be and how much actual processing power FAH can find in the donor community. Another question is how it needs to be programmed. FAH originated with the x86 instruction set and has been adapted to make use of common extensions. Programming GPUs has required a whole new programming methods and new languages/APIs. DirectX didn't work (...well?) but with CTM/CAL/Brook, the step to ATI was achieved. Then CUDA came along, making NV possible and Sony did something for the PS3. Now OpenCL has come along further extending what can be done with GPUs.

IBM has published the programming manual. That sort of implies a new and different set of proprietary programming tools (just a guess) rather than a way to drive MIC through OpenCL. Why should that be? (... though historically IBM has favored a proprietary approach.)

If you look at the picture (above) it does look a lot like a GPU without the video generating hardware.

iceman1992 wrote:I am thinking, since they have simpler cores, they will perform somewhat like GPUs. Very fast, yet not very flexible.

A lot of that actually depends on the programming interface. Future GPUs are destined to become more flexible than it was when using the first generation of FahCores written in the earlier generations of parallel languages.

From what I read in several places (one example), it's a Pentium 1 with customized vector units for SIMD, all optimized for FP64 (double precision). No standard x86 SIMD support (single and double), so no SSE support, so no FAH support, at least not at any great speed. It (sse and fah) would all be emulated, like on an ARM chip, and slow.

Maybe in the next gen MIC... Sorry.

My wild bet is on having a strightforwared x86 multicore support.
Microsoft is talking about multicore support since a while and having x86 instruction set without common software developement support is going to be unexpected to me.

Said this I think there is a probability for folding needing just minor changes to SMP.
I almost bet on an Intel extra help to Pande group just for good advertising (anyone from Intel reading? )

As last line ... any hint about the purchase price for such an interesting thing?

@7im : from intel's blog http://blogs.intel.com/technology/2012/ ... nnovation/

The codes that run on Intel Xeon processors today will run on Intel Xeon Phi products, carrying forward years of software development.

Of course that could be just marketing BS. We'll have to wait