Re: PCIe Slot Speed - x1 x2 x4 x8 x16
Posted: Wed Jul 01, 2020 6:30 am
Maybe it is because my gtx 1080ti was power limited and so clock speed at 1.5Ghz instead of boost 2.0 Ghz?
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You wil have that many PCIe lanes if, and only if, the logic board supports that many. Just because the Xeon processors support that many, there often is no business or technical reason to provide that many to the slots. So many server grade boards only use some of the available lanes from the processors. You have to check the specs on each board beforehand.Sparkly wrote:The E5-2670 has 40 PCIe lanes, so with 2 of them on a board you get 80.
https://ark.intel.com/content/www/us/en ... l-qpi.html
And since the Xenon is server grade, then the motherboard supporting it will most likely also have all 16 PCIe lanes connected to each x16 slot, as opposed to a lot of consumer grade motherboards, where you will often have a x16/x8 configuration, meaning you have a physical size x16 slot, but there are only 8 PCIe lanes connected to it.
Most likely.foldy wrote:Maybe it is because my gtx 1080ti was power limited and so clock speed at 1.5Ghz instead of boost 2.0 Ghz?
Not to mention, dual CPU systems speak to one another via PCIE lanes too.Joe_H wrote:You wil have that many PCIe lanes if, and only if, the logic board supports that many. Just because the Xeon processors support that many, there often is no business or technical reason to provide that many to the slots. So many server grade boards only use some of the available lanes from the processors. You have to check the specs on each board beforehand.Sparkly wrote:The E5-2670 has 40 PCIe lanes, so with 2 of them on a board you get 80.
https://ark.intel.com/content/www/us/en ... l-qpi.html
And since the Xenon is server grade, then the motherboard supporting it will most likely also have all 16 PCIe lanes connected to each x16 slot, as opposed to a lot of consumer grade motherboards, where you will often have a x16/x8 configuration, meaning you have a physical size x16 slot, but there are only 8 PCIe lanes connected to it.
No, Xeon processors since 2008 have used QPI for interprocessor communication, that changed to UPI with chips produced starting in 2017. Totally separate bus from PCIe, and the number of QPI/UPI connections available distinguish Xeon processors intended for single, dual, and multi-processor systems.MeeLee wrote:Not to mention, dual CPU systems speak to one another via PCIE lanes too.
At least 8 CPU lanes (or more) will be dedicated to just the CPUs communication ring, mostly to share ram with one another.